A structure is known in which, in a chip including a memory cell transistor of a stack gate structure in which a floating gate and a control gate are stacked, a resistance element of a peripheral circuit is formed using polysilicon of the floating gate.
In addition, a memory device of a three-dimensional structure is proposed in which a memory hole is formed in a stacked body in which an electrode film functioning as the control gate of a memory cell and an inter-electrode insulating film are alternately stacked in plural, and a silicon body serving as a channel is provided on the side wall of the memory hole via a charge storage film. In such a memory device of a three-dimensional structure, it is required also for the resistance element to have a different structure from a memory device of a two-dimensional structure.